diff -pruN 1.15.8-1/debian/changelog 1.15.8-1ubuntu3/debian/changelog --- 1.15.8-1/debian/changelog 2021-02-05 12:51:44.000000000 +0000 +++ 1.15.8-1ubuntu3/debian/changelog 2021-02-17 01:18:23.000000000 +0000 @@ -1,3 +1,29 @@ +golang-1.15 (1.15.8-1ubuntu3) hirsute; urgency=medium + + * d/patches/0001-cmd-link-check-CGO_CFLAGS-for-non-g-I-O-options-befo.patch: + updated, fixed version. + + -- Michael Hudson-Doyle Wed, 17 Feb 2021 14:18:23 +1300 + +golang-1.15 (1.15.8-1ubuntu2) hirsute; urgency=medium + + * Cherrypick cgo riscv64 patches. + + -- Dimitri John Ledkov Wed, 10 Feb 2021 14:38:26 +0000 + +golang-1.15 (1.15.8-1ubuntu1) hirsute; urgency=medium + + * Merge from Debian unstable. Remaining change: + - d/patches/0001-cmd-link-check-CGO_CFLAGS-for-non-g-I-O-options-befo.patch: + disable internal linking when dynamically linking and CGO_CFLAGS contains + flags that might make host object files that the internal linkers ELF + reader does not support. This fixes lots of package builds when LTO is + enabled by default via dpkg-buildflags. + * Dropped change, now in Debian: + - cmd/dist: increase default timeout scale for arm (LP: #1893640) + + -- Michael Hudson-Doyle Tue, 09 Feb 2021 22:18:58 +1300 + golang-1.15 (1.15.8-1) unstable; urgency=medium * Team upload. @@ -44,18 +70,49 @@ golang-1.15 (1.15.5-1) unstable; urgency -- Michael Hudson-Doyle Fri, 13 Nov 2020 09:40:16 +1300 +golang-1.15 (1.15.4-1ubuntu2) hirsute; urgency=medium + + * d/patches/0001-cmd-link-check-CGO_CFLAGS-for-non-g-I-O-options-befo.patch: + disable internal linking when dynamically linking and CGO_CFLAGS contains + flags that might make host object files that the internal linkers ELF + reader does not support. This fixes lots of package builds when LTO is + enabled by default via dpkg-buildflags. + + -- Michael Hudson-Doyle Sun, 17 Jan 2021 12:09:47 +1300 + +golang-1.15 (1.15.4-1ubuntu1) hirsute; urgency=medium + + * Merge from Debian unstable. Remaining changes: + - cmd/dist: increase default timeout scale for arm (LP: #1893640) + * Cherrypick cgo riscv64 patches. + + -- Dimitri John Ledkov Tue, 10 Nov 2020 17:23:08 +0000 + golang-1.15 (1.15.4-1) unstable; urgency=medium * New upstream version 1.15.4. -- Michael Hudson-Doyle Tue, 10 Nov 2020 10:48:51 +1300 +golang-1.15 (1.15.2-1ubuntu1) groovy; urgency=low + + * Merge from Debian unstable. Remaining changes: + - cmd/dist: increase default timeout scale for arm (LP: #1893640) + + -- Dimitri John Ledkov Tue, 15 Sep 2020 10:46:23 +0100 + golang-1.15 (1.15.2-1) unstable; urgency=medium * New upstream version 1.15.2. -- Michael Hudson-Doyle Tue, 15 Sep 2020 09:51:42 +1200 +golang-1.15 (1.15-2ubuntu1) groovy; urgency=medium + + * cmd/dist: increase default timeout scale for arm (LP: #1893640) + + -- Balint Reczey Mon, 31 Aug 2020 13:30:32 +0200 + golang-1.15 (1.15-2) unstable; urgency=medium * Team upload. @@ -1524,3 +1581,4 @@ golang (2011.02.01.1-1) unstable; urgenc * Remove codereview directory - some python code to deal with mercurial -- Ondřej Surý Mon, 14 Feb 2011 17:42:39 +0100 + diff -pruN 1.15.8-1/debian/control 1.15.8-1ubuntu3/debian/control --- 1.15.8-1/debian/control 2021-02-05 12:51:44.000000000 +0000 +++ 1.15.8-1ubuntu3/debian/control 2021-02-17 01:18:23.000000000 +0000 @@ -3,7 +3,8 @@ # Source: golang-1.15 -Maintainer: Go Compiler Team +Maintainer: Ubuntu Developers +XSBC-Original-Maintainer: Go Compiler Team Uploaders: Michael Stapelberg , Paul Tagliamonte , Tianon Gravi , diff -pruN 1.15.8-1/debian/control.in 1.15.8-1ubuntu3/debian/control.in --- 1.15.8-1/debian/control.in 2021-02-05 12:51:44.000000000 +0000 +++ 1.15.8-1ubuntu3/debian/control.in 2021-02-17 01:18:23.000000000 +0000 @@ -1,5 +1,6 @@ Source: golang-X.Y -Maintainer: Go Compiler Team +Maintainer: Ubuntu Developers +XSBC-Original-Maintainer: Go Compiler Team Uploaders: Michael Stapelberg , Paul Tagliamonte , Tianon Gravi , diff -pruN 1.15.8-1/debian/patches/0001-cmd-link-check-CGO_CFLAGS-for-non-g-I-O-options-befo.patch 1.15.8-1ubuntu3/debian/patches/0001-cmd-link-check-CGO_CFLAGS-for-non-g-I-O-options-befo.patch --- 1.15.8-1/debian/patches/0001-cmd-link-check-CGO_CFLAGS-for-non-g-I-O-options-befo.patch 1970-01-01 00:00:00.000000000 +0000 +++ 1.15.8-1ubuntu3/debian/patches/0001-cmd-link-check-CGO_CFLAGS-for-non-g-I-O-options-befo.patch 2021-02-17 01:18:23.000000000 +0000 @@ -0,0 +1,80 @@ +From 9842b1f35452eaf8b2ca7252905bc6501a956202 Mon Sep 17 00:00:00 2001 +From: Michael Hudson-Doyle +Date: Wed, 6 Jan 2021 12:18:24 +1300 +Subject: [PATCH] cmd/link: check CGO_CFLAGS for non -g/-I/-O options before + internal linking + +On Ubuntu we are investigating enabling link-time optimization by +default, which means the default CFLAGS will contain arguments that +cause gcc to generate object files cmd/link/internal/loadelf cannot +process. Rather than failing in this situation, scan CGO_CFLAGS in +mustLinkExternal and do not link internally if there is a flag that does +not start with -g, -I, or -O. + +CFLAGS can also be injected via #cgo CFLAGS: directives but as use of +any non-standard library cgo modules disables internal linking anyway, +we don't have to worry about that here. + +Fixes #43505 + +Change-Id: Ib083f6daf22617e2e5df67e95d3bc178942328cd +--- + src/cmd/link/internal/ld/config.go | 28 ++++++++++++++++++++++++++++ + 1 file changed, 28 insertions(+) + +diff --git a/src/cmd/link/internal/ld/config.go b/src/cmd/link/internal/ld/config.go +index d1e06239a5..fddebdeb80 100644 +--- a/src/cmd/link/internal/ld/config.go ++++ b/src/cmd/link/internal/ld/config.go +@@ -9,6 +9,8 @@ import ( + "cmd/internal/sys" + "fmt" + "log" ++ "os" ++ "strings" + ) + + // A BuildMode indicates the sort of object we are building. +@@ -238,6 +240,29 @@ func mustLinkExternal(ctxt *Link) (res bool, reason string) { + return false, "" + } + ++// Some arguments in CGO_CFLAGS can cause the host compiler to ++// generate object files that loadelf cannot handle but arguments ++// starting with any of these values are OK. ++var internalOKCflagPrefixes = []string{ ++ "-O", ++ "-g", ++ "-I", ++} ++ ++func cflagsOKForInternalLinking() bool { ++outer: ++ for _, flag := range strings.Fields(os.Getenv("CGO_CFLAGS")) { ++ for _, okPrefix := range internalOKCflagPrefixes { ++ if strings.HasPrefix(flag, okPrefix) { ++ continue outer ++ } ++ } ++ return false ++ } ++ ++ return true ++} ++ + // determineLinkMode sets ctxt.LinkMode. + // + // It is called after flags are processed and inputs are processed, +@@ -262,6 +287,9 @@ func determineLinkMode(ctxt *Link) { + default: + if extNeeded || (iscgo && externalobj) { + ctxt.LinkMode = LinkExternal ++ } else if iscgo && !cflagsOKForInternalLinking() { ++ ctxt.LinkMode = LinkExternal ++ extReason = "CGO_CFLAGS contains flag that may inhibit internal linking" + } else { + ctxt.LinkMode = LinkInternal + } +-- +2.25.1 + diff -pruN 1.15.8-1/debian/patches/1f76e888dfcc67159b012c503ed2961691e0cf85.patch 1.15.8-1ubuntu3/debian/patches/1f76e888dfcc67159b012c503ed2961691e0cf85.patch --- 1.15.8-1/debian/patches/1f76e888dfcc67159b012c503ed2961691e0cf85.patch 1970-01-01 00:00:00.000000000 +0000 +++ 1.15.8-1ubuntu3/debian/patches/1f76e888dfcc67159b012c503ed2961691e0cf85.patch 2021-02-17 01:18:23.000000000 +0000 @@ -0,0 +1,707 @@ +From 1f76e888dfcc67159b012c503ed2961691e0cf85 Mon Sep 17 00:00:00 2001 +From: Joel Sing +Date: Tue, 19 May 2020 18:56:01 +1000 +Subject: [PATCH] cmd/dist,cmd/go,runtime: add support for cgo on linux/riscv64 + +Change-Id: I51868d83ce341d78d33b221d184c5a5110c60d14 +--- + .../cgo/test/testdata/issue9400/asm_riscv64.s | 33 +++ + src/cmd/dist/build.go | 2 +- + src/cmd/dist/test.go | 2 +- + .../testdata/script/build_plugin_non_main.txt | 3 +- + src/cmd/nm/nm_cgo_test.go | 2 +- + src/runtime/asm_riscv64.s | 209 +++++++++++++++++- + src/runtime/cgo/asm_riscv64.s | 88 ++++++++ + src/runtime/cgo/gcc_linux_riscv64.c | 78 +++++++ + src/runtime/cgo/gcc_riscv64.S | 87 ++++++++ + src/runtime/cgocall.go | 6 +- + src/runtime/sys_linux_riscv64.s | 5 + + src/runtime/tls_riscv64.s | 16 +- + 12 files changed, 512 insertions(+), 19 deletions(-) + create mode 100644 misc/cgo/test/testdata/issue9400/asm_riscv64.s + create mode 100644 src/runtime/cgo/asm_riscv64.s + create mode 100644 src/runtime/cgo/gcc_linux_riscv64.c + create mode 100644 src/runtime/cgo/gcc_riscv64.S + +diff --git a/misc/cgo/test/testdata/issue9400/asm_riscv64.s b/misc/cgo/test/testdata/issue9400/asm_riscv64.s +new file mode 100644 +index 000000000000..772050deba55 +--- /dev/null ++++ b/misc/cgo/test/testdata/issue9400/asm_riscv64.s +@@ -0,0 +1,33 @@ ++// Copyright 2016 The Go Authors. All rights reserved. ++// Use of this source code is governed by a BSD-style ++// license that can be found in the LICENSE file. ++ ++// +build riscv64 ++// +build !gccgo ++ ++#include "textflag.h" ++ ++#define FENCE WORD $0x0ff0000f ++ ++TEXT ·RewindAndSetgid(SB),NOSPLIT|NOFRAME,$0-0 ++ // Rewind stack pointer so anything that happens on the stack ++ // will clobber the test pattern created by the caller ++ ADD $(1024*8), X2 ++ ++ // Ask signaller to setgid ++ MOV $1, X5 ++ FENCE ++ MOVW X5, ·Baton(SB) ++ FENCE ++ ++ // Wait for setgid completion ++loop: ++ FENCE ++ MOVW ·Baton(SB), X5 ++ OR X6, X6, X6 // hint that we're in a spin loop ++ BNE ZERO, X5, loop ++ FENCE ++ ++ // Restore stack ++ ADD $(-1024*8), X2 ++ RET +diff --git a/src/cmd/dist/build.go b/src/cmd/dist/build.go +index 9e2b4f33b866..5caa6e3b4694 100644 +--- a/src/cmd/dist/build.go ++++ b/src/cmd/dist/build.go +@@ -1533,7 +1533,7 @@ var cgoEnabled = map[string]bool{ + "linux/mipsle": true, + "linux/mips64": true, + "linux/mips64le": true, +- "linux/riscv64": false, // Issue 36641 ++ "linux/riscv64": true, + "linux/s390x": true, + "linux/sparc64": true, + "android/386": true, +diff --git a/src/cmd/dist/test.go b/src/cmd/dist/test.go +index 2dc945921524..d07042f43e30 100644 +--- a/src/cmd/dist/test.go ++++ b/src/cmd/dist/test.go +@@ -947,7 +947,7 @@ func (t *tester) internalLink() bool { + // Internally linking cgo is incomplete on some architectures. + // https://golang.org/issue/10373 + // https://golang.org/issue/14449 +- if goarch == "mips64" || goarch == "mips64le" || goarch == "mips" || goarch == "mipsle" { ++ if goarch == "mips64" || goarch == "mips64le" || goarch == "mips" || goarch == "mipsle" || goarch == "riscv64" { + return false + } + if goos == "aix" { +diff --git a/src/cmd/go/testdata/script/build_plugin_non_main.txt b/src/cmd/go/testdata/script/build_plugin_non_main.txt +index 996d87d96129..1d561e81c98f 100644 +--- a/src/cmd/go/testdata/script/build_plugin_non_main.txt ++++ b/src/cmd/go/testdata/script/build_plugin_non_main.txt +@@ -1,5 +1,6 @@ +-# Plugins are only supported on linux,cgo and darwin,cgo. ++# Plugins are only supported on linux,cgo (!riscv64) and darwin,cgo. + [!linux] [!darwin] skip ++[linux] [riscv64] skip + [!cgo] skip + + go build -n testdep/p2 +diff --git a/src/cmd/nm/nm_cgo_test.go b/src/cmd/nm/nm_cgo_test.go +index 9a257e0ed2ec..e0414e6b2221 100644 +--- a/src/cmd/nm/nm_cgo_test.go ++++ b/src/cmd/nm/nm_cgo_test.go +@@ -24,7 +24,7 @@ func canInternalLink() bool { + } + case "linux": + switch runtime.GOARCH { +- case "arm64", "mips64", "mips64le", "mips", "mipsle", "ppc64", "ppc64le": ++ case "arm64", "mips64", "mips64le", "mips", "mipsle", "ppc64", "ppc64le", "riscv64": + return false + } + case "openbsd": +diff --git a/src/runtime/asm_riscv64.s b/src/runtime/asm_riscv64.s +index d7c45a183dca..fd5c4cae45fa 100644 +--- a/src/runtime/asm_riscv64.s ++++ b/src/runtime/asm_riscv64.s +@@ -9,10 +9,9 @@ + // func rt0_go() + TEXT runtime·rt0_go(SB),NOSPLIT,$0 + // X2 = stack; A0 = argc; A1 = argv +- + ADD $-24, X2 +- MOV A0, 8(X2) // argc +- MOV A1, 16(X2) // argv ++ MOV A0, 8(X2) // argc ++ MOV A1, 16(X2) // argv + + // create istack out of the given (operating system) stack. + // _cgo_init may update stackguard. +@@ -28,10 +27,10 @@ TEXT runtime·rt0_go(SB),NOSPLIT,$0 + MOV _cgo_init(SB), T0 + BEQ T0, ZERO, nocgo + +- MOV ZERO, A3 // arg 3: not used +- MOV ZERO, A2 // arg 2: not used ++ MOV ZERO, A3 // arg 3: not used ++ MOV ZERO, A2 // arg 2: not used + MOV $setg_gcc<>(SB), A1 // arg 1: setg +- MOV g, A0 // arg 0: G ++ MOV g, A0 // arg 0: G + JALR RA, T0 + + nocgo: +@@ -313,10 +312,78 @@ TEXT runtime·gosave(SB), NOSPLIT|NOFRAME, $0-8 + CALL runtime·badctxt(SB) + RET + ++// Save state of caller into g->sched. Smashes X31. ++TEXT gosave<>(SB),NOSPLIT|NOFRAME,$0 ++ MOV X1, (g_sched+gobuf_pc)(g) ++ MOV X2, (g_sched+gobuf_sp)(g) ++ MOV ZERO, (g_sched+gobuf_lr)(g) ++ MOV ZERO, (g_sched+gobuf_ret)(g) ++ // Assert ctxt is zero. See func save. ++ MOV (g_sched+gobuf_ctxt)(g), X31 ++ BEQ ZERO, X31, 2(PC) ++ CALL runtime·badctxt(SB) ++ RET ++ + // func asmcgocall(fn, arg unsafe.Pointer) int32 ++// Call fn(arg) on the scheduler stack, ++// aligned appropriately for the gcc ABI. ++// See cgocall.go for more details. + TEXT ·asmcgocall(SB),NOSPLIT,$0-20 +- // TODO(jsing): Add support for cgo - issue #36641. +- WORD $0 // crash ++ MOV fn+0(FP), X5 ++ MOV arg+8(FP), X10 ++ ++ MOV X2, X8 // save original stack pointer ++ MOV g, X9 ++ ++ // Figure out if we need to switch to m->g0 stack. ++ // We get called to create new OS threads too, and those ++ // come in on the m->g0 stack already. ++ MOV g_m(g), X6 ++ MOV m_g0(X6), X7 ++ BEQ X7, g, g0 ++ ++ CALL gosave<>(SB) ++ MOV X7, g ++ CALL runtime·save_g(SB) ++ MOV (g_sched+gobuf_sp)(g), X2 ++ ++ // Now on a scheduling stack (a pthread-created stack). ++g0: ++ // Save room for two of our pointers. ++ ADD $-16, X2 ++ MOV X9, 0(X2) // save old g on stack ++ MOV (g_stack+stack_hi)(X9), X9 ++ SUB X8, X9, X8 ++ MOV X8, 8(X2) // save depth in old g stack (can't just save SP, as stack might be copied during a callback) ++ ++ JALR RA, (X5) ++ ++ // Restore g, stack pointer. X10 is return value. ++ MOV 0(X2), g ++ CALL runtime·save_g(SB) ++ MOV (g_stack+stack_hi)(g), X5 ++ MOV 8(X2), X6 ++ SUB X6, X5, X6 ++ MOV X6, X2 ++ ++ MOVW X10, ret+16(FP) ++ RET ++ ++// cgocallback(void (*fn)(void*), void *frame, uintptr framesize, uintptr ctxt) ++// Turn the fn into a Go func (by taking its address) and call ++// cgocallback_gofunc. ++TEXT runtime·cgocallback(SB),NOSPLIT,$32-32 ++ MOV $fn+0(FP), X5 ++ MOV X5, 8(SP) ++ MOV frame+8(FP), X5 ++ MOV X5, 16(SP) ++ MOV framesize+16(FP), X5 ++ MOV X5, 24(SP) ++ MOV ctxt+24(FP), X5 ++ MOV X5, 32(SP) ++ MOV $runtime·cgocallback_gofunc(SB), X5 ++ JALR RA, X5 ++ RET + + // func asminit() + TEXT runtime·asminit(SB),NOSPLIT|NOFRAME,$0-0 +@@ -443,6 +510,23 @@ CALLFN(·call268435456, 268435456) + CALLFN(·call536870912, 536870912) + CALLFN(·call1073741824, 1073741824) + ++// Called from cgo wrappers, this function returns g->m->curg.stack.hi. ++// Must obey the gcc calling convention. ++TEXT _cgo_topofstack(SB),NOSPLIT,$16 ++ // g (X30) and REG_TMP (X31) might be clobbered by load_g. They ++ // are callee-save in the gcc calling convention, so save them. ++ MOV X31, savedX31-16(SP) ++ MOV g, savedG-8(SP) ++ ++ CALL runtime·load_g(SB) ++ MOV g_m(g), X5 ++ MOV m_curg(X5), X5 ++ MOV (g_stack+stack_hi)(X5), X10 // return value in X10 ++ ++ MOV savedG-8(SP), g ++ MOV savedX31-16(SP), X31 ++ RET ++ + // func goexit(neverCallThisFunction) + // The top-most function running on a goroutine + // returns to goexit+PCQuantum. +@@ -452,10 +536,111 @@ TEXT runtime·goexit(SB),NOSPLIT|NOFRAME|TOPFRAME,$0-0 + // traceback from goexit1 must hit code range of goexit + MOV ZERO, ZERO // NOP + +-// func cgocallback_gofunc(fv uintptr, frame uintptr, framesize, ctxt uintptr) +-TEXT ·cgocallback_gofunc(SB),NOSPLIT,$24-32 +- // TODO(jsing): Add support for cgo - issue #36641. +- WORD $0 // crash ++// cgocallback_gofunc(FuncVal*, void *frame, uintptr framesize, uintptr ctxt) ++// See cgocall.go for more details. ++TEXT ·cgocallback_gofunc(SB),NOSPLIT,$16-32 ++ NO_LOCAL_POINTERS ++ ++ // Load m and g from thread-local storage. ++ MOVBU runtime·iscgo(SB), X5 ++ BEQ ZERO, X5, nocgo ++ CALL runtime·load_g(SB) ++nocgo: ++ ++ // If g is nil, Go did not create the current thread. ++ // Call needm to obtain one for temporary use. ++ // In this case, we're running on the thread stack, so there's ++ // lots of space, but the linker doesn't know. Hide the call from ++ // the linker analysis by using an indirect call. ++ BEQ ZERO, g, needm ++ ++ MOV g_m(g), X5 ++ MOV X5, savedm-8(SP) ++ JMP havem ++ ++needm: ++ MOV g, savedm-8(SP) // g is zero, so is m. ++ MOV $runtime·needm(SB), X6 ++ JALR RA, X6 ++ ++ // Set m->sched.sp = SP, so that if a panic happens ++ // during the function we are about to execute, it will ++ // have a valid SP to run on the g0 stack. ++ // The next few lines (after the havem label) ++ // will save this SP onto the stack and then write ++ // the same SP back to m->sched.sp. That seems redundant, ++ // but if an unrecovered panic happens, unwindm will ++ // restore the g->sched.sp from the stack location ++ // and then systemstack will try to use it. If we don't set it here, ++ // that restored SP will be uninitialized (typically 0) and ++ // will not be usable. ++ MOV g_m(g), X5 ++ MOV m_g0(X5), X6 ++ MOV X2, (g_sched+gobuf_sp)(X6) ++ ++havem: ++ // Now there's a valid m, and we're running on its m->g0. ++ // Save current m->g0->sched.sp on stack and then set it to SP. ++ // Save current sp in m->g0->sched.sp in preparation for ++ // switch back to m->curg stack. ++ // NOTE: unwindm knows that the saved g->sched.sp is at 8(R29) aka savedsp-16(SP). ++ MOV m_g0(X5), X6 ++ MOV (g_sched+gobuf_sp)(X6), X7 ++ MOV X7, savedsp-16(SP) ++ MOV X2, (g_sched+gobuf_sp)(X6) ++ ++ // Switch to m->curg stack and call runtime.cgocallbackg. ++ // Because we are taking over the execution of m->curg ++ // but *not* resuming what had been running, we need to ++ // save that information (m->curg->sched) so we can restore it. ++ // We can restore m->curg->sched.sp easily, because calling ++ // runtime.cgocallbackg leaves SP unchanged upon return. ++ // To save m->curg->sched.pc, we push it onto the stack. ++ // This has the added benefit that it looks to the traceback ++ // routine like cgocallbackg is going to return to that ++ // PC (because the frame we allocate below has the same ++ // size as cgocallback_gofunc's frame declared above) ++ // so that the traceback will seamlessly trace back into ++ // the earlier calls. ++ // ++ // In the new goroutine, -8(SP) is unused (where SP refers to ++ // m->curg's SP while we're setting it up, before we've adjusted it). ++ MOV m_curg(X5), g ++ CALL runtime·save_g(SB) ++ MOV (g_sched+gobuf_sp)(g), X6 // prepare stack as X6 ++ MOV (g_sched+gobuf_pc)(g), X7 ++ MOV X7, -24(X6) ++ MOV ctxt+24(FP), X8 ++ MOV X8, -16(X6) ++ MOV $-24(X6), X2 ++ CALL runtime·cgocallbackg(SB) ++ ++ // Restore g->sched (== m->curg->sched) from saved values. ++ MOV 0(X2), X7 ++ MOV X7, (g_sched+gobuf_pc)(g) ++ MOV $24(X2), X6 ++ MOV X6, (g_sched+gobuf_sp)(g) ++ ++ // Switch back to m->g0's stack and restore m->g0->sched.sp. ++ // (Unlike m->curg, the g0 goroutine never uses sched.pc, ++ // so we do not have to restore it.) ++ MOV g_m(g), X5 ++ MOV m_g0(X5), g ++ CALL runtime·save_g(SB) ++ MOV (g_sched+gobuf_sp)(g), X2 ++ MOV savedsp-16(SP), X6 ++ MOV X6, (g_sched+gobuf_sp)(g) ++ ++ // If the m on entry was nil, we called needm above to borrow an m ++ // for the duration of the call. Since the call is over, return it with dropm. ++ MOV savedm-8(SP), X5 ++ BNE ZERO, X5, droppedm ++ MOV $runtime·dropm(SB), X6 ++ JALR RA, X6 ++droppedm: ++ ++ // Done! ++ RET + + TEXT runtime·breakpoint(SB),NOSPLIT|NOFRAME,$0-0 + EBREAK +diff --git a/src/runtime/cgo/asm_riscv64.s b/src/runtime/cgo/asm_riscv64.s +new file mode 100644 +index 000000000000..81fee7a115b1 +--- /dev/null ++++ b/src/runtime/cgo/asm_riscv64.s +@@ -0,0 +1,88 @@ ++// Copyright 2020 The Go Authors. All rights reserved. ++// Use of this source code is governed by a BSD-style ++// license that can be found in the LICENSE file. ++ ++// +build riscv64 ++ ++#include "textflag.h" ++ ++/* ++ * void crosscall2(void (*fn)(void*, int32, uintptr), void*, int32, uintptr) ++ * Save registers and call fn with two arguments. ++ */ ++TEXT crosscall2(SB),NOSPLIT|NOFRAME,$0 ++ /* ++ * Push arguments for fn (X10, X11, X12), along with all callee-save ++ * registers. Note that at procedure entry the first argument is at ++ * 8(X2). ++ */ ++ ADD $(-8*31), X2 ++ MOV X11, (8*1)(X2) // void* ++ MOVW X12, (8*2)(X2) // int32 ++ MOV X13, (8*3)(X2) // uintptr ++ MOV X8, (8*4)(X2) ++ MOV X9, (8*5)(X2) ++ MOV X18, (8*6)(X2) ++ MOV X19, (8*7)(X2) ++ MOV X20, (8*8)(X2) ++ MOV X21, (8*9)(X2) ++ MOV X22, (8*10)(X2) ++ MOV X23, (8*11)(X2) ++ MOV X24, (8*12)(X2) ++ MOV X25, (8*13)(X2) ++ MOV X26, (8*14)(X2) ++ MOV X27, (8*15)(X2) ++ MOV X3, (8*16)(X2) ++ MOV X4, (8*17)(X2) ++ MOV X1, (8*18)(X2) ++ MOVD F8, (8*19)(X2) ++ MOVD F9, (8*20)(X2) ++ MOVD F18, (8*21)(X2) ++ MOVD F19, (8*22)(X2) ++ MOVD F20, (8*23)(X2) ++ MOVD F21, (8*24)(X2) ++ MOVD F22, (8*25)(X2) ++ MOVD F23, (8*26)(X2) ++ MOVD F24, (8*27)(X2) ++ MOVD F25, (8*28)(X2) ++ MOVD F26, (8*29)(X2) ++ MOVD F27, (8*30)(X2) ++ ++ // Initialize Go ABI environment ++ // prepare SB register = PC & 0xffffffff00000000 ++ AUIPC $0, X3 ++ SRL $32, X3 ++ SLL $32, X3 ++ CALL runtime·load_g(SB) ++ JALR RA, X10 ++ ++ MOV (8*4)(X2), X8 ++ MOV (8*5)(X2), X9 ++ MOV (8*6)(X2), X18 ++ MOV (8*7)(X2), X19 ++ MOV (8*8)(X2), X20 ++ MOV (8*9)(X2), X21 ++ MOV (8*10)(X2), X22 ++ MOV (8*11)(X2), X23 ++ MOV (8*12)(X2), X24 ++ MOV (8*13)(X2), X25 ++ MOV (8*14)(X2), X26 ++ MOV (8*15)(X2), X27 ++ MOV (8*16)(X2), X3 ++ MOV (8*17)(X2), X4 ++ MOV (8*18)(X2), X1 ++ MOVD (8*19)(X2), F8 ++ MOVD (8*20)(X2), F9 ++ MOVD (8*21)(X2), F18 ++ MOVD (8*22)(X2), F19 ++ MOVD (8*23)(X2), F20 ++ MOVD (8*24)(X2), F21 ++ MOVD (8*25)(X2), F22 ++ MOVD (8*26)(X2), F23 ++ MOVD (8*27)(X2), F24 ++ MOVD (8*28)(X2), F25 ++ MOVD (8*29)(X2), F26 ++ MOVD (8*30)(X2), F27 ++ ADD $(8*31), X2 ++ ++ RET +diff --git a/src/runtime/cgo/gcc_linux_riscv64.c b/src/runtime/cgo/gcc_linux_riscv64.c +new file mode 100644 +index 000000000000..f04c3259976b +--- /dev/null ++++ b/src/runtime/cgo/gcc_linux_riscv64.c +@@ -0,0 +1,78 @@ ++// Copyright 2016 The Go Authors. All rights reserved. ++// Use of this source code is governed by a BSD-style ++// license that can be found in the LICENSE file. ++ ++// +build cgo ++// +build linux ++// +build riscv64 ++ ++#include ++#include ++#include ++#include "libcgo.h" ++#include "libcgo_unix.h" ++ ++static void *threadentry(void*); ++ ++void (*x_cgo_inittls)(void **tlsg, void **tlsbase); ++static void (*setg_gcc)(void*); ++ ++void ++_cgo_sys_thread_start(ThreadStart *ts) ++{ ++ pthread_attr_t attr; ++ sigset_t ign, oset; ++ pthread_t p; ++ size_t size; ++ int err; ++ ++ sigfillset(&ign); ++ pthread_sigmask(SIG_SETMASK, &ign, &oset); ++ ++ // Not sure why the memset is necessary here, ++ // but without it, we get a bogus stack size ++ // out of pthread_attr_getstacksize. C'est la Linux. ++ memset(&attr, 0, sizeof attr); ++ pthread_attr_init(&attr); ++ size = 0; ++ pthread_attr_getstacksize(&attr, &size); ++ // Leave stacklo=0 and set stackhi=size; mstart will do the rest. ++ ts->g->stackhi = size; ++ err = _cgo_try_pthread_create(&p, &attr, threadentry, ts); ++ ++ pthread_sigmask(SIG_SETMASK, &oset, nil); ++ ++ if (err != 0) { ++ fatalf("pthread_create failed: %s", strerror(err)); ++ } ++} ++ ++extern void crosscall1(void (*fn)(void), void (*setg_gcc)(void*), void *g); ++static void* ++threadentry(void *v) ++{ ++ ThreadStart ts; ++ ++ ts = *(ThreadStart*)v; ++ free(v); ++ ++ crosscall1(ts.fn, setg_gcc, (void*)ts.g); ++ return nil; ++} ++ ++void ++x_cgo_init(G *g, void (*setg)(void*), void **tlsg, void **tlsbase) ++{ ++ pthread_attr_t attr; ++ size_t size; ++ ++ setg_gcc = setg; ++ pthread_attr_init(&attr); ++ pthread_attr_getstacksize(&attr, &size); ++ g->stacklo = (uintptr)&attr - size + 4096; ++ pthread_attr_destroy(&attr); ++ ++ if (x_cgo_inittls) { ++ x_cgo_inittls(tlsg, tlsbase); ++ } ++} +diff --git a/src/runtime/cgo/gcc_riscv64.S b/src/runtime/cgo/gcc_riscv64.S +new file mode 100644 +index 000000000000..05d35c81008b +--- /dev/null ++++ b/src/runtime/cgo/gcc_riscv64.S +@@ -0,0 +1,87 @@ ++// Copyright 2020 The Go Authors. All rights reserved. ++// Use of this source code is governed by a BSD-style ++// license that can be found in the LICENSE file. ++ ++// +build riscv64 ++ ++/* ++ * void crosscall1(void (*fn)(void), void (*setg_gcc)(void *g), void *g) ++ * ++ * Calling into the gc tool chain, where all registers are caller save. ++ * Called from standard RISCV ELF psABI, where x8-x9, x18-x27, f8-f9 and ++ * f18-f27 are callee-save, so they must be saved explicitly, along with ++ * x1 (LR). ++ */ ++.globl crosscall1 ++crosscall1: ++ sd x1, -200(sp) ++ addi sp, sp, -200 ++ sd x8, 8(sp) ++ sd x9, 16(sp) ++ sd x18, 24(sp) ++ sd x19, 32(sp) ++ sd x20, 40(sp) ++ sd x21, 48(sp) ++ sd x22, 56(sp) ++ sd x23, 64(sp) ++ sd x24, 72(sp) ++ sd x25, 80(sp) ++ sd x26, 88(sp) ++ sd x27, 96(sp) ++ fsd f8, 104(sp) ++ fsd f9, 112(sp) ++ fsd f18, 120(sp) ++ fsd f19, 128(sp) ++ fsd f20, 136(sp) ++ fsd f21, 144(sp) ++ fsd f22, 152(sp) ++ fsd f23, 160(sp) ++ fsd f24, 168(sp) ++ fsd f25, 176(sp) ++ fsd f26, 184(sp) ++ fsd f27, 192(sp) ++ ++ // prepare SB register = pc & 0xffffffff00000000 ++ auipc x3, 0 ++ srli x3, x3, 32 ++ slli x3, x3, 32 ++ ++ // a0 = *fn, a1 = *setg_gcc, a2 = *g ++ mv s1, a0 ++ mv s0, a1 ++ mv a0, a2 ++ jalr ra, s0 // call setg_gcc (clobbers x30 aka g) ++ jalr ra, s1 // call fn ++ ++ ld x1, 0(sp) ++ ld x8, 8(sp) ++ ld x9, 16(sp) ++ ld x18, 24(sp) ++ ld x19, 32(sp) ++ ld x20, 40(sp) ++ ld x21, 48(sp) ++ ld x22, 56(sp) ++ ld x23, 64(sp) ++ ld x24, 72(sp) ++ ld x25, 80(sp) ++ ld x26, 88(sp) ++ ld x27, 96(sp) ++ fld f8, 104(sp) ++ fld f9, 112(sp) ++ fld f18, 120(sp) ++ fld f19, 128(sp) ++ fld f20, 136(sp) ++ fld f21, 144(sp) ++ fld f22, 152(sp) ++ fld f23, 160(sp) ++ fld f24, 168(sp) ++ fld f25, 176(sp) ++ fld f26, 184(sp) ++ fld f27, 192(sp) ++ addi sp, sp, 200 ++ ++ jr ra ++ ++#ifdef __ELF__ ++.section .note.GNU-stack,"",%progbits ++#endif +diff --git a/src/runtime/cgocall.go b/src/runtime/cgocall.go +index a4e64b00ccd2..a0ae037fa5fa 100644 +--- a/src/runtime/cgocall.go ++++ b/src/runtime/cgocall.go +@@ -321,6 +321,10 @@ func cgocallbackg1(ctxt uintptr) { + // On mipsx, stack frame is two words and there's a saved LR between + // SP and the stack frame and between the stack frame and the arguments. + cb = (*args)(unsafe.Pointer(sp + 4*sys.PtrSize)) ++ case "riscv64": ++ // On riscv64, stack frame is two words and there's a saved LR between ++ // SP and the stack frame and between the stack frame and the arguments. ++ cb = (*args)(unsafe.Pointer(sp + 4*sys.PtrSize)) + } + + // Invoke callback. +@@ -356,7 +360,7 @@ func unwindm(restore *bool) { + switch GOARCH { + default: + throw("unwindm not implemented") +- case "386", "amd64", "arm", "ppc64", "ppc64le", "mips64", "mips64le", "s390x", "mips", "mipsle": ++ case "386", "amd64", "arm", "ppc64", "ppc64le", "mips64", "mips64le", "s390x", "mips", "mipsle", "riscv64": + sched.sp = *(*uintptr)(unsafe.Pointer(sched.sp + sys.MinFrameSize)) + case "arm64": + sched.sp = *(*uintptr)(unsafe.Pointer(sched.sp + 16)) +diff --git a/src/runtime/sys_linux_riscv64.s b/src/runtime/sys_linux_riscv64.s +index 626ab3912cbf..3ba5a28e80ab 100644 +--- a/src/runtime/sys_linux_riscv64.s ++++ b/src/runtime/sys_linux_riscv64.s +@@ -282,6 +282,11 @@ TEXT runtime·sigfwd(SB),NOSPLIT,$0-32 + + // func sigtramp(signo, ureg, ctxt unsafe.Pointer) + TEXT runtime·sigtramp(SB),NOSPLIT,$64 ++ // initialize SB = PC&0xffffffff00000000 ++ AUIPC $0, X3 ++ SRL $32, X3 ++ SLL $32, X3 ++ + MOVW A0, 8(X2) + MOV A1, 16(X2) + MOV A2, 24(X2) +diff --git a/src/runtime/tls_riscv64.s b/src/runtime/tls_riscv64.s +index 838698042121..020888dad2b4 100644 +--- a/src/runtime/tls_riscv64.s ++++ b/src/runtime/tls_riscv64.s +@@ -9,10 +9,22 @@ + + // If !iscgo, this is a no-op. + // +-// NOTE: mcall() assumes this clobbers only R23 (REGTMP). +-// FIXME: cgo ++// NOTE: mcall() assumes this clobbers only X31 (REG_TMP). + TEXT runtime·save_g(SB),NOSPLIT|NOFRAME,$0-0 ++ MOVB runtime·iscgo(SB), X31 ++ BEQ X0, X31, nocgo ++ ++ MOV runtime·tls_g(SB), X31 ++ ADD X4, X31 ++ MOV g, (X31) ++ ++nocgo: + RET + + TEXT runtime·load_g(SB),NOSPLIT|NOFRAME,$0-0 ++ MOV runtime·tls_g(SB), X31 ++ ADD X4, X31 ++ MOV (X31), g + RET ++ ++GLOBL runtime·tls_g(SB), TLSBSS, $8 diff -pruN 1.15.8-1/debian/patches/70ca9a801164e370cc6adf443d40a95c24143400.patch 1.15.8-1ubuntu3/debian/patches/70ca9a801164e370cc6adf443d40a95c24143400.patch --- 1.15.8-1/debian/patches/70ca9a801164e370cc6adf443d40a95c24143400.patch 1970-01-01 00:00:00.000000000 +0000 +++ 1.15.8-1ubuntu3/debian/patches/70ca9a801164e370cc6adf443d40a95c24143400.patch 2021-02-17 01:18:23.000000000 +0000 @@ -0,0 +1,1070 @@ +From 70ca9a801164e370cc6adf443d40a95c24143400 Mon Sep 17 00:00:00 2001 +From: Joel Sing +Date: Tue, 19 May 2020 18:55:31 +1000 +Subject: [PATCH] cmd/compile,cmd/internal/obj/riscv: move g register on + riscv64 + +The original riscv64 port used the thread pointer (TP aka X4) register for +the g pointer, however this register is also used when TLS support is +required, resulting in a conflict (for example, when a signal is received +we have no way of readily knowing if X4 contains a pointer to the TCB or +a pointer to a g). + +In order to support cgo, free up the X4 register by moving g to X27. +This unfortunately means that the X4 register is unused in non-cgo mode, +however the alternative is to not support cgo on this platform. + +Change-Id: Idcaf3e8ccbe42972a1b8943aeefde7149d9c960a +--- + .../compile/internal/ssa/gen/RISCV64Ops.go | 7 +- + src/cmd/compile/internal/ssa/opGen.go | 312 +++++++++--------- + src/cmd/internal/obj/riscv/cpu.go | 12 +- + 3 files changed, 166 insertions(+), 165 deletions(-) + +diff --git a/src/cmd/compile/internal/ssa/gen/RISCV64Ops.go b/src/cmd/compile/internal/ssa/gen/RISCV64Ops.go +index 8ab4abe04a07..e83e8655611a 100644 +--- a/src/cmd/compile/internal/ssa/gen/RISCV64Ops.go ++++ b/src/cmd/compile/internal/ssa/gen/RISCV64Ops.go +@@ -24,10 +24,11 @@ import ( + // L = 64 bit int, used when the opcode starts with F + + const ( +- riscv64REG_G = 4 ++ riscv64REG_G = 27 + riscv64REG_CTXT = 20 + riscv64REG_LR = 1 + riscv64REG_SP = 2 ++ riscv64REG_TP = 4 + riscv64REG_TMP = 31 + riscv64REG_ZERO = 0 + ) +@@ -78,8 +79,8 @@ func init() { + + // Add general purpose registers to gpMask. + switch r { +- // ZERO, and TMP are not in any gp mask. +- case riscv64REG_ZERO, riscv64REG_TMP: ++ // ZERO, TP and TMP are not in any gp mask. ++ case riscv64REG_ZERO, riscv64REG_TP, riscv64REG_TMP: + case riscv64REG_G: + gpgMask |= mask + gpspsbgMask |= mask +diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go +index 9efa1bfcc4bd..f3518ddea2ea 100644 +--- a/src/cmd/compile/internal/ssa/opGen.go ++++ b/src/cmd/compile/internal/ssa/opGen.go +@@ -26962,11 +26962,11 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AADD, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 +- {1, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 ++ {1, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -26977,10 +26977,10 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AADDI, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 9223372037928517622}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 SB ++ {0, 9223372037861408758}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27030,11 +27030,11 @@ var opcodeTable = [...]opInfo{ + asm: riscv.ASUB, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 +- {1, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 ++ {1, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27059,11 +27059,11 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AMUL, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 +- {1, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 ++ {1, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27074,11 +27074,11 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AMULW, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 +- {1, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 ++ {1, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27089,11 +27089,11 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AMULH, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 +- {1, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 ++ {1, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27104,11 +27104,11 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AMULHU, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 +- {1, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 ++ {1, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27118,11 +27118,11 @@ var opcodeTable = [...]opInfo{ + asm: riscv.ADIV, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 +- {1, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 ++ {1, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27132,11 +27132,11 @@ var opcodeTable = [...]opInfo{ + asm: riscv.ADIVU, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 +- {1, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 ++ {1, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27146,11 +27146,11 @@ var opcodeTable = [...]opInfo{ + asm: riscv.ADIVW, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 +- {1, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 ++ {1, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27160,11 +27160,11 @@ var opcodeTable = [...]opInfo{ + asm: riscv.ADIVUW, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 +- {1, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 ++ {1, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27174,11 +27174,11 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AREM, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 +- {1, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 ++ {1, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27188,11 +27188,11 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AREMU, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 +- {1, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 ++ {1, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27202,11 +27202,11 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AREMW, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 +- {1, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 ++ {1, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27216,11 +27216,11 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AREMUW, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 +- {1, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 ++ {1, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27233,10 +27233,10 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AMOV, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 9223372037928517622}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 SB ++ {0, 9223372037861408758}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27248,7 +27248,7 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AMOV, + reg: regInfo{ + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27260,7 +27260,7 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AMOV, + reg: regInfo{ + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27272,7 +27272,7 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AMOV, + reg: regInfo{ + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27284,7 +27284,7 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AMOV, + reg: regInfo{ + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27297,10 +27297,10 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AMOVB, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 9223372037928517622}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 SB ++ {0, 9223372037861408758}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27313,10 +27313,10 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AMOVH, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 9223372037928517622}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 SB ++ {0, 9223372037861408758}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27329,10 +27329,10 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AMOVW, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 9223372037928517622}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 SB ++ {0, 9223372037861408758}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27345,10 +27345,10 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AMOV, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 9223372037928517622}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 SB ++ {0, 9223372037861408758}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27361,10 +27361,10 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AMOVBU, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 9223372037928517622}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 SB ++ {0, 9223372037861408758}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27377,10 +27377,10 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AMOVHU, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 9223372037928517622}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 SB ++ {0, 9223372037861408758}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27393,10 +27393,10 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AMOVWU, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 9223372037928517622}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 SB ++ {0, 9223372037861408758}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27409,8 +27409,8 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AMOVB, + reg: regInfo{ + inputs: []inputInfo{ +- {1, 1073741814}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 +- {0, 9223372037928517622}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 SB ++ {1, 1006632950}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 ++ {0, 9223372037861408758}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + }, + }, + }, +@@ -27423,8 +27423,8 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AMOVH, + reg: regInfo{ + inputs: []inputInfo{ +- {1, 1073741814}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 +- {0, 9223372037928517622}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 SB ++ {1, 1006632950}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 ++ {0, 9223372037861408758}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + }, + }, + }, +@@ -27437,8 +27437,8 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AMOVW, + reg: regInfo{ + inputs: []inputInfo{ +- {1, 1073741814}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 +- {0, 9223372037928517622}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 SB ++ {1, 1006632950}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 ++ {0, 9223372037861408758}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + }, + }, + }, +@@ -27451,8 +27451,8 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AMOV, + reg: regInfo{ + inputs: []inputInfo{ +- {1, 1073741814}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 +- {0, 9223372037928517622}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 SB ++ {1, 1006632950}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 ++ {0, 9223372037861408758}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + }, + }, + }, +@@ -27514,11 +27514,11 @@ var opcodeTable = [...]opInfo{ + asm: riscv.ASLL, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 +- {1, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 ++ {1, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27528,11 +27528,11 @@ var opcodeTable = [...]opInfo{ + asm: riscv.ASRA, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 +- {1, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 ++ {1, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27542,11 +27542,11 @@ var opcodeTable = [...]opInfo{ + asm: riscv.ASRL, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 +- {1, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 ++ {1, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27557,10 +27557,10 @@ var opcodeTable = [...]opInfo{ + asm: riscv.ASLLI, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27571,10 +27571,10 @@ var opcodeTable = [...]opInfo{ + asm: riscv.ASRAI, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27585,10 +27585,10 @@ var opcodeTable = [...]opInfo{ + asm: riscv.ASRLI, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27599,11 +27599,11 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AXOR, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 +- {1, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 ++ {1, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27614,10 +27614,10 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AXORI, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27628,11 +27628,11 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AOR, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 +- {1, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 ++ {1, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27643,10 +27643,10 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AORI, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27657,11 +27657,11 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AAND, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 +- {1, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 ++ {1, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27672,10 +27672,10 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AANDI, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27698,10 +27698,10 @@ var opcodeTable = [...]opInfo{ + asm: riscv.ASEQZ, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27711,10 +27711,10 @@ var opcodeTable = [...]opInfo{ + asm: riscv.ASNEZ, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27724,11 +27724,11 @@ var opcodeTable = [...]opInfo{ + asm: riscv.ASLT, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 +- {1, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 ++ {1, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27739,10 +27739,10 @@ var opcodeTable = [...]opInfo{ + asm: riscv.ASLTI, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27752,11 +27752,11 @@ var opcodeTable = [...]opInfo{ + asm: riscv.ASLTU, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 +- {1, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 ++ {1, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27767,10 +27767,10 @@ var opcodeTable = [...]opInfo{ + asm: riscv.ASLTIU, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27780,10 +27780,10 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AMOV, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -27794,7 +27794,7 @@ var opcodeTable = [...]opInfo{ + call: true, + symEffect: SymNone, + reg: regInfo{ +- clobbers: 9223372035781033980, // X3 g X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 ++ clobbers: 9223372035781033972, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 + }, + }, + { +@@ -27805,9 +27805,9 @@ var opcodeTable = [...]opInfo{ + reg: regInfo{ + inputs: []inputInfo{ + {1, 524288}, // X20 +- {0, 1073741814}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632950}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, +- clobbers: 9223372035781033980, // X3 g X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 ++ clobbers: 9223372035781033972, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 + }, + }, + { +@@ -27817,9 +27817,9 @@ var opcodeTable = [...]opInfo{ + call: true, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, +- clobbers: 9223372035781033980, // X3 g X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 ++ clobbers: 9223372035781033972, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 + }, + }, + { +@@ -27830,7 +27830,7 @@ var opcodeTable = [...]opInfo{ + reg: regInfo{ + inputs: []inputInfo{ + {0, 16}, // X5 +- {1, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {1, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + clobbers: 16, // X5 + }, +@@ -27845,7 +27845,7 @@ var opcodeTable = [...]opInfo{ + inputs: []inputInfo{ + {0, 16}, // X5 + {1, 32}, // X6 +- {2, 1073741748}, // X3 X5 X6 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {2, 1006632884}, // X3 X5 X6 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + clobbers: 112, // X5 X6 X7 + }, +@@ -28034,7 +28034,7 @@ var opcodeTable = [...]opInfo{ + faultOnNilArg0: true, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741814}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632950}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -28053,7 +28053,7 @@ var opcodeTable = [...]opInfo{ + rematerializeable: true, + reg: regInfo{ + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -28063,7 +28063,7 @@ var opcodeTable = [...]opInfo{ + rematerializeable: true, + reg: regInfo{ + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -28207,7 +28207,7 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AFMVSX, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ + {0, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 +@@ -28220,7 +28220,7 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AFCVTSW, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ + {0, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 +@@ -28233,7 +28233,7 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AFCVTSL, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ + {0, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 +@@ -28249,7 +28249,7 @@ var opcodeTable = [...]opInfo{ + {0, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -28262,7 +28262,7 @@ var opcodeTable = [...]opInfo{ + {0, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -28275,7 +28275,7 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AMOVF, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 9223372037928517622}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 SB ++ {0, 9223372037861408758}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + }, + outputs: []outputInfo{ + {0, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 +@@ -28291,7 +28291,7 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AMOVF, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 9223372037928517622}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 SB ++ {0, 9223372037861408758}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + {1, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 + }, + }, +@@ -28307,7 +28307,7 @@ var opcodeTable = [...]opInfo{ + {1, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -28322,7 +28322,7 @@ var opcodeTable = [...]opInfo{ + {1, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -28336,7 +28336,7 @@ var opcodeTable = [...]opInfo{ + {1, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -28350,7 +28350,7 @@ var opcodeTable = [...]opInfo{ + {1, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -28444,7 +28444,7 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AFMVDX, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ + {0, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 +@@ -28457,7 +28457,7 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AFCVTDW, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ + {0, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 +@@ -28470,7 +28470,7 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AFCVTDL, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + outputs: []outputInfo{ + {0, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 +@@ -28486,7 +28486,7 @@ var opcodeTable = [...]opInfo{ + {0, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -28499,7 +28499,7 @@ var opcodeTable = [...]opInfo{ + {0, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -28538,7 +28538,7 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AMOVD, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 9223372037928517622}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 SB ++ {0, 9223372037861408758}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + }, + outputs: []outputInfo{ + {0, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 +@@ -28554,7 +28554,7 @@ var opcodeTable = [...]opInfo{ + asm: riscv.AMOVD, + reg: regInfo{ + inputs: []inputInfo{ +- {0, 9223372037928517622}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 SB ++ {0, 9223372037861408758}, // SP X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + {1, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 + }, + }, +@@ -28570,7 +28570,7 @@ var opcodeTable = [...]opInfo{ + {1, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -28585,7 +28585,7 @@ var opcodeTable = [...]opInfo{ + {1, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -28599,7 +28599,7 @@ var opcodeTable = [...]opInfo{ + {1, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -28613,7 +28613,7 @@ var opcodeTable = [...]opInfo{ + {1, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 + }, + outputs: []outputInfo{ +- {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 ++ {0, 1006632948}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + }, + }, + }, +@@ -35809,7 +35809,7 @@ var registersRISCV64 = [...]Register{ + {0, riscv.REG_X0, -1, "X0"}, + {1, riscv.REGSP, -1, "SP"}, + {2, riscv.REG_X3, 0, "X3"}, +- {3, riscv.REGG, -1, "g"}, ++ {3, riscv.REG_X4, -1, "X4"}, + {4, riscv.REG_X5, 1, "X5"}, + {5, riscv.REG_X6, 2, "X6"}, + {6, riscv.REG_X7, 3, "X7"}, +@@ -35832,10 +35832,10 @@ var registersRISCV64 = [...]Register{ + {23, riscv.REG_X24, 20, "X24"}, + {24, riscv.REG_X25, 21, "X25"}, + {25, riscv.REG_X26, 22, "X26"}, +- {26, riscv.REG_X27, 23, "X27"}, +- {27, riscv.REG_X28, 24, "X28"}, +- {28, riscv.REG_X29, 25, "X29"}, +- {29, riscv.REG_X30, 26, "X30"}, ++ {26, riscv.REGG, -1, "g"}, ++ {27, riscv.REG_X28, 23, "X28"}, ++ {28, riscv.REG_X29, 24, "X29"}, ++ {29, riscv.REG_X30, 25, "X30"}, + {30, riscv.REG_X31, -1, "X31"}, + {31, riscv.REG_F0, -1, "F0"}, + {32, riscv.REG_F1, -1, "F1"}, +@@ -35871,7 +35871,7 @@ var registersRISCV64 = [...]Register{ + {62, riscv.REG_F31, -1, "F31"}, + {63, 0, -1, "SB"}, + } +-var gpRegMaskRISCV64 = regMask(1073741812) ++var gpRegMaskRISCV64 = regMask(1006632948) + var fpRegMaskRISCV64 = regMask(9223372034707292160) + var specialRegMaskRISCV64 = regMask(0) + var framepointerRegRISCV64 = int8(-1) +diff --git a/src/cmd/internal/obj/riscv/cpu.go b/src/cmd/internal/obj/riscv/cpu.go +index 482f9e0b6da1..b1324b62a037 100644 +--- a/src/cmd/internal/obj/riscv/cpu.go ++++ b/src/cmd/internal/obj/riscv/cpu.go +@@ -109,7 +109,7 @@ const ( + REG_RA = REG_X1 // aka REG_LR + REG_SP = REG_X2 + REG_GP = REG_X3 // aka REG_SB +- REG_TP = REG_X4 // aka REG_G ++ REG_TP = REG_X4 + REG_T0 = REG_X5 + REG_T1 = REG_X6 + REG_T2 = REG_X7 +@@ -132,17 +132,17 @@ const ( + REG_S8 = REG_X24 + REG_S9 = REG_X25 + REG_S10 = REG_X26 +- REG_S11 = REG_X27 ++ REG_S11 = REG_X27 // aka REG_G + REG_T3 = REG_X28 + REG_T4 = REG_X29 + REG_T5 = REG_X30 + REG_T6 = REG_X31 // aka REG_TMP + + // Go runtime register names. +- REG_G = REG_TP // G pointer. +- REG_CTXT = REG_S4 // Context for closures. +- REG_LR = REG_RA // Link register. +- REG_TMP = REG_T6 // Reserved for assembler use. ++ REG_G = REG_S11 // G pointer. ++ REG_CTXT = REG_S4 // Context for closures. ++ REG_LR = REG_RA // Link register. ++ REG_TMP = REG_T6 // Reserved for assembler use. + + // ABI names for floating point registers. + REG_FT0 = REG_F0 diff -pruN 1.15.8-1/debian/patches/98d9c96b21ae096926575363091ec1fccfd6416e.patch 1.15.8-1ubuntu3/debian/patches/98d9c96b21ae096926575363091ec1fccfd6416e.patch --- 1.15.8-1/debian/patches/98d9c96b21ae096926575363091ec1fccfd6416e.patch 1970-01-01 00:00:00.000000000 +0000 +++ 1.15.8-1ubuntu3/debian/patches/98d9c96b21ae096926575363091ec1fccfd6416e.patch 2021-02-17 01:18:23.000000000 +0000 @@ -0,0 +1,203 @@ +From 98d9c96b21ae096926575363091ec1fccfd6416e Mon Sep 17 00:00:00 2001 +From: Joel Sing +Date: Tue, 19 May 2020 18:55:10 +1000 +Subject: [PATCH] cmd/link,cmd/internal/obj/riscv: add TLS support for + linux/riscv64 + +Add support for Thread Local Storage (TLS) for linux/riscv64 with external +linking, using the initial-exec model. + +Change-Id: I3106ef9a29cde73215830b00deff43dbec1c76e0 +--- + src/cmd/internal/obj/riscv/obj.go | 7 +++ + src/cmd/internal/objabi/reloctype.go | 8 +++ + src/cmd/internal/objabi/reloctype_string.go | 67 ++++++++++++++++++++- + src/cmd/link/internal/riscv64/asm.go | 15 ++++- + src/cmd/link/link_test.go | 4 ++ + 5 files changed, 96 insertions(+), 5 deletions(-) + +diff --git a/src/cmd/internal/obj/riscv/obj.go b/src/cmd/internal/obj/riscv/obj.go +index 2eb2935b318e..69c9a3150489 100644 +--- a/src/cmd/internal/obj/riscv/obj.go ++++ b/src/cmd/internal/obj/riscv/obj.go +@@ -1982,6 +1982,13 @@ func assemble(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { + ctxt.Diag("AUIPC needing PC-relative reloc missing symbol") + break + } ++ if addr.Sym.Type == objabi.STLSBSS { ++ if rt == objabi.R_RISCV_PCREL_ITYPE { ++ rt = objabi.R_RISCV_TLS_IE_ITYPE ++ } else if rt == objabi.R_RISCV_PCREL_STYPE { ++ rt = objabi.R_RISCV_TLS_IE_STYPE ++ } ++ } + + rel := obj.Addrel(cursym) + rel.Off = int32(p.Pc) +diff --git a/src/cmd/internal/objabi/reloctype.go b/src/cmd/internal/objabi/reloctype.go +index f029a3c396df..b84abced0fa2 100644 +--- a/src/cmd/internal/objabi/reloctype.go ++++ b/src/cmd/internal/objabi/reloctype.go +@@ -212,6 +212,14 @@ const ( + // AUIPC + S-type instruction pair. + R_RISCV_PCREL_STYPE + ++ // R_RISCV_TLS_IE_ITYPE resolves a 32-bit TLS initial-exec TOC offset ++ // address using an AUIPC + I-type instruction pair. ++ R_RISCV_TLS_IE_ITYPE ++ ++ // R_RISCV_TLS_IE_STYPE resolves a 32-bit TLS initial-exec TOC offset ++ // address using an AUIPC + S-type instruction pair. ++ R_RISCV_TLS_IE_STYPE ++ + // R_PCRELDBL relocates s390x 2-byte aligned PC-relative addresses. + // TODO(mundaym): remove once variants can be serialized - see issue 14218. + R_PCRELDBL +diff --git a/src/cmd/internal/objabi/reloctype_string.go b/src/cmd/internal/objabi/reloctype_string.go +index 83dfe71e0717..b9843fdceb1a 100644 +--- a/src/cmd/internal/objabi/reloctype_string.go ++++ b/src/cmd/internal/objabi/reloctype_string.go +@@ -4,9 +4,72 @@ package objabi + + import "strconv" + +-const _RelocType_name = "R_ADDRR_ADDRPOWERR_ADDRARM64R_ADDRMIPSR_ADDROFFR_WEAKADDROFFR_SIZER_CALLR_CALLARMR_CALLARM64R_CALLINDR_CALLPOWERR_CALLMIPSR_CALLRISCVR_CONSTR_PCRELR_TLS_LER_TLS_IER_GOTOFFR_PLT0R_PLT1R_PLT2R_USEFIELDR_USETYPER_METHODOFFR_POWER_TOCR_GOTPCRELR_JMPMIPSR_DWARFSECREFR_DWARFFILEREFR_ARM64_TLS_LER_ARM64_TLS_IER_ARM64_GOTPCRELR_ARM64_GOTR_ARM64_PCRELR_ARM64_LDST8R_ARM64_LDST32R_ARM64_LDST64R_ARM64_LDST128R_POWER_TLS_LER_POWER_TLS_IER_POWER_TLSR_ADDRPOWER_DSR_ADDRPOWER_GOTR_ADDRPOWER_PCRELR_ADDRPOWER_TOCRELR_ADDRPOWER_TOCREL_DSR_RISCV_PCREL_ITYPER_RISCV_PCREL_STYPER_PCRELDBLR_ADDRMIPSUR_ADDRMIPSTLSR_ADDRCUOFFR_WASMIMPORTR_XCOFFREF" ++func _() { ++ // An "invalid array index" compiler error signifies that the constant values have changed. ++ // Re-run the stringer command to generate them again. ++ var x [1]struct{} ++ _ = x[R_ADDR-1] ++ _ = x[R_ADDRPOWER-2] ++ _ = x[R_ADDRARM64-3] ++ _ = x[R_ADDRMIPS-4] ++ _ = x[R_ADDROFF-5] ++ _ = x[R_WEAKADDROFF-6] ++ _ = x[R_SIZE-7] ++ _ = x[R_CALL-8] ++ _ = x[R_CALLARM-9] ++ _ = x[R_CALLARM64-10] ++ _ = x[R_CALLIND-11] ++ _ = x[R_CALLPOWER-12] ++ _ = x[R_CALLMIPS-13] ++ _ = x[R_CALLRISCV-14] ++ _ = x[R_CONST-15] ++ _ = x[R_PCREL-16] ++ _ = x[R_TLS_LE-17] ++ _ = x[R_TLS_IE-18] ++ _ = x[R_GOTOFF-19] ++ _ = x[R_PLT0-20] ++ _ = x[R_PLT1-21] ++ _ = x[R_PLT2-22] ++ _ = x[R_USEFIELD-23] ++ _ = x[R_USETYPE-24] ++ _ = x[R_METHODOFF-25] ++ _ = x[R_POWER_TOC-26] ++ _ = x[R_GOTPCREL-27] ++ _ = x[R_JMPMIPS-28] ++ _ = x[R_DWARFSECREF-29] ++ _ = x[R_DWARFFILEREF-30] ++ _ = x[R_ARM64_TLS_LE-31] ++ _ = x[R_ARM64_TLS_IE-32] ++ _ = x[R_ARM64_GOTPCREL-33] ++ _ = x[R_ARM64_GOT-34] ++ _ = x[R_ARM64_PCREL-35] ++ _ = x[R_ARM64_LDST8-36] ++ _ = x[R_ARM64_LDST32-37] ++ _ = x[R_ARM64_LDST64-38] ++ _ = x[R_ARM64_LDST128-39] ++ _ = x[R_POWER_TLS_LE-40] ++ _ = x[R_POWER_TLS_IE-41] ++ _ = x[R_POWER_TLS-42] ++ _ = x[R_ADDRPOWER_DS-43] ++ _ = x[R_ADDRPOWER_GOT-44] ++ _ = x[R_ADDRPOWER_PCREL-45] ++ _ = x[R_ADDRPOWER_TOCREL-46] ++ _ = x[R_ADDRPOWER_TOCREL_DS-47] ++ _ = x[R_RISCV_PCREL_ITYPE-48] ++ _ = x[R_RISCV_PCREL_STYPE-49] ++ _ = x[R_RISCV_TLS_IE_ITYPE-50] ++ _ = x[R_RISCV_TLS_IE_STYPE-51] ++ _ = x[R_PCRELDBL-52] ++ _ = x[R_ADDRMIPSU-53] ++ _ = x[R_ADDRMIPSTLS-54] ++ _ = x[R_ADDRCUOFF-55] ++ _ = x[R_WASMIMPORT-56] ++ _ = x[R_XCOFFREF-57] ++} ++ ++const _RelocType_name = "R_ADDRR_ADDRPOWERR_ADDRARM64R_ADDRMIPSR_ADDROFFR_WEAKADDROFFR_SIZER_CALLR_CALLARMR_CALLARM64R_CALLINDR_CALLPOWERR_CALLMIPSR_CALLRISCVR_CONSTR_PCRELR_TLS_LER_TLS_IER_GOTOFFR_PLT0R_PLT1R_PLT2R_USEFIELDR_USETYPER_METHODOFFR_POWER_TOCR_GOTPCRELR_JMPMIPSR_DWARFSECREFR_DWARFFILEREFR_ARM64_TLS_LER_ARM64_TLS_IER_ARM64_GOTPCRELR_ARM64_GOTR_ARM64_PCRELR_ARM64_LDST8R_ARM64_LDST32R_ARM64_LDST64R_ARM64_LDST128R_POWER_TLS_LER_POWER_TLS_IER_POWER_TLSR_ADDRPOWER_DSR_ADDRPOWER_GOTR_ADDRPOWER_PCRELR_ADDRPOWER_TOCRELR_ADDRPOWER_TOCREL_DSR_RISCV_PCREL_ITYPER_RISCV_PCREL_STYPER_RISCV_TLS_IE_ITYPER_RISCV_TLS_IE_STYPER_PCRELDBLR_ADDRMIPSUR_ADDRMIPSTLSR_ADDRCUOFFR_WASMIMPORTR_XCOFFREF" + +-var _RelocType_index = [...]uint16{0, 6, 17, 28, 38, 47, 60, 66, 72, 81, 92, 101, 112, 122, 133, 140, 147, 155, 163, 171, 177, 183, 189, 199, 208, 219, 230, 240, 249, 262, 276, 290, 304, 320, 331, 344, 357, 371, 385, 400, 414, 428, 439, 453, 468, 485, 503, 524, 543, 562, 572, 583, 596, 607, 619, 629} ++var _RelocType_index = [...]uint16{0, 6, 17, 28, 38, 47, 60, 66, 72, 81, 92, 101, 112, 122, 133, 140, 147, 155, 163, 171, 177, 183, 189, 199, 208, 219, 230, 240, 249, 262, 276, 290, 304, 320, 331, 344, 357, 371, 385, 400, 414, 428, 439, 453, 468, 485, 503, 524, 543, 562, 582, 602, 612, 623, 636, 647, 659, 669} + + func (i RelocType) String() string { + i -= 1 +diff --git a/src/cmd/link/internal/riscv64/asm.go b/src/cmd/link/internal/riscv64/asm.go +index a3f19b2a7253..7ed45d29e1f1 100644 +--- a/src/cmd/link/internal/riscv64/asm.go ++++ b/src/cmd/link/internal/riscv64/asm.go +@@ -67,7 +67,7 @@ func elfreloc1(ctxt *ld.Link, s *sym.Symbol, r *sym.Reloc, sectoff int64) bool { + // TODO(jsing): Consider generating elf.R_RISCV_CALL instead of a + // HI20/LO12_I pair. + +- case objabi.R_RISCV_PCREL_ITYPE, objabi.R_RISCV_PCREL_STYPE: ++ case objabi.R_RISCV_PCREL_ITYPE, objabi.R_RISCV_PCREL_STYPE, objabi.R_RISCV_TLS_IE_ITYPE, objabi.R_RISCV_TLS_IE_STYPE: + // Find the text symbol for the AUIPC instruction targeted + // by this relocation. + hi20Sym := findHI20Symbol(ctxt, s.Value+int64(r.Off)) +@@ -86,6 +86,10 @@ func elfreloc1(ctxt *ld.Link, s *sym.Symbol, r *sym.Reloc, sectoff int64) bool { + hiRel, loRel = elf.R_RISCV_PCREL_HI20, elf.R_RISCV_PCREL_LO12_I + case objabi.R_RISCV_PCREL_STYPE: + hiRel, loRel = elf.R_RISCV_PCREL_HI20, elf.R_RISCV_PCREL_LO12_S ++ case objabi.R_RISCV_TLS_IE_ITYPE: ++ hiRel, loRel = elf.R_RISCV_TLS_GOT_HI20, elf.R_RISCV_PCREL_LO12_I ++ case objabi.R_RISCV_TLS_IE_STYPE: ++ hiRel, loRel = elf.R_RISCV_TLS_GOT_HI20, elf.R_RISCV_PCREL_LO12_S + } + ctxt.Out.Write64(uint64(sectoff)) + ctxt.Out.Write64(uint64(hiRel) | uint64(elfsym)<<32) +@@ -119,7 +123,7 @@ func archreloc(target *ld.Target, syms *ld.ArchSyms, r *sym.Reloc, s *sym.Symbol + r.Xadd = r.Add + return val, true + +- case objabi.R_RISCV_PCREL_ITYPE, objabi.R_RISCV_PCREL_STYPE: ++ case objabi.R_RISCV_PCREL_ITYPE, objabi.R_RISCV_PCREL_STYPE, objabi.R_RISCV_TLS_IE_ITYPE, objabi.R_RISCV_TLS_IE_STYPE: + r.Done = false + + // Set up addend for eventual relocation via outer symbol. +@@ -146,6 +150,10 @@ func archreloc(target *ld.Target, syms *ld.ArchSyms, r *sym.Reloc, s *sym.Symbol + // Nothing to do. + return val, true + ++ case objabi.R_RISCV_TLS_IE_ITYPE, objabi.R_RISCV_TLS_IE_STYPE: ++ // Nothing to do. ++ return val, true ++ + case objabi.R_RISCV_PCREL_ITYPE, objabi.R_RISCV_PCREL_STYPE: + pc := s.Value + int64(r.Off) + off := ld.Symaddr(r.Sym) + r.Add - pc +@@ -202,7 +210,8 @@ func genHi20TextSymbols(ctxt *ld.Link) { + var syms []*sym.Symbol + for _, s := range ctxt.Textp { + for _, r := range s.R { +- if r.Type != objabi.R_RISCV_PCREL_ITYPE && r.Type != objabi.R_RISCV_PCREL_STYPE { ++ if r.Type != objabi.R_RISCV_PCREL_ITYPE && r.Type != objabi.R_RISCV_PCREL_STYPE && ++ r.Type != objabi.R_RISCV_TLS_IE_ITYPE && r.Type != objabi.R_RISCV_TLS_IE_STYPE { + continue + } + sym := &sym.Symbol{ +diff --git a/src/cmd/link/link_test.go b/src/cmd/link/link_test.go +index 8f417ec8db26..3db2c1591489 100644 +--- a/src/cmd/link/link_test.go ++++ b/src/cmd/link/link_test.go +@@ -541,6 +541,10 @@ func TestOldLink(t *testing.T) { + + testenv.MustHaveGoBuild(t) + ++ if runtime.GOOS == "linux" && runtime.GOARCH == "riscv64" { ++ t.Skipf("skipping because oldlink does not handle TLS on linux/riscv64") ++ } ++ + // Check that the old linker exists (we don't ship it in binary releases, + // see issue 39509). + cmd := exec.Command(testenv.GoToolPath(t), "tool", "-n", "oldlink") diff -pruN 1.15.8-1/debian/patches/ba41f5960408a58339e6efb1bf379031cc35efeb.patch 1.15.8-1ubuntu3/debian/patches/ba41f5960408a58339e6efb1bf379031cc35efeb.patch --- 1.15.8-1/debian/patches/ba41f5960408a58339e6efb1bf379031cc35efeb.patch 1970-01-01 00:00:00.000000000 +0000 +++ 1.15.8-1ubuntu3/debian/patches/ba41f5960408a58339e6efb1bf379031cc35efeb.patch 2021-02-17 01:18:23.000000000 +0000 @@ -0,0 +1,78 @@ +From ba41f5960408a58339e6efb1bf379031cc35efeb Mon Sep 17 00:00:00 2001 +From: Joel Sing +Date: Tue, 2 Jun 2020 23:34:06 +1000 +Subject: [PATCH] cmd/compile,cmd/internal/sys: enable non-exe build modes on + linux/riscv64 + +Change-Id: I15a8a51b84dbbb82a5b6592aec84a7f09f0cc37f +--- + src/cmd/compile/internal/gc/main.go | 2 +- + src/cmd/go/go_test.go | 2 +- + src/cmd/internal/sys/supported.go | 8 ++++---- + 3 files changed, 6 insertions(+), 6 deletions(-) + +diff --git a/src/cmd/compile/internal/gc/main.go b/src/cmd/compile/internal/gc/main.go +index 756cdbd3c9bc..34997f475409 100644 +--- a/src/cmd/compile/internal/gc/main.go ++++ b/src/cmd/compile/internal/gc/main.go +@@ -132,7 +132,7 @@ func hidePanic() { + // supportsDynlink reports whether or not the code generator for the given + // architecture supports the -shared and -dynlink flags. + func supportsDynlink(arch *sys.Arch) bool { +- return arch.InFamily(sys.AMD64, sys.ARM, sys.ARM64, sys.I386, sys.PPC64, sys.S390X) ++ return arch.InFamily(sys.AMD64, sys.ARM, sys.ARM64, sys.I386, sys.PPC64, sys.RISCV64, sys.S390X) + } + + // timing data for compiler phases +diff --git a/src/cmd/go/go_test.go b/src/cmd/go/go_test.go +index 021930a8a817..8093341a1adb 100644 +--- a/src/cmd/go/go_test.go ++++ b/src/cmd/go/go_test.go +@@ -2058,7 +2058,7 @@ func TestBuildmodePIE(t *testing.T) { + + platform := fmt.Sprintf("%s/%s", runtime.GOOS, runtime.GOARCH) + switch platform { +- case "linux/386", "linux/amd64", "linux/arm", "linux/arm64", "linux/ppc64le", "linux/s390x", ++ case "linux/386", "linux/amd64", "linux/arm", "linux/arm64", "linux/ppc64le", "linux/riscv64", "linux/s390x", + "android/amd64", "android/arm", "android/arm64", "android/386", + "freebsd/amd64", + "windows/386", "windows/amd64", "windows/arm": +diff --git a/src/cmd/internal/sys/supported.go b/src/cmd/internal/sys/supported.go +index c27b3b986d8b..527f739d4168 100644 +--- a/src/cmd/internal/sys/supported.go ++++ b/src/cmd/internal/sys/supported.go +@@ -66,7 +66,7 @@ func BuildModeSupported(compiler, buildmode, goos, goarch string) bool { + + case "c-shared": + switch platform { +- case "linux/amd64", "linux/arm", "linux/arm64", "linux/386", "linux/ppc64le", "linux/s390x", ++ case "linux/amd64", "linux/arm", "linux/arm64", "linux/386", "linux/ppc64le", "linux/riscv64", "linux/s390x", + "android/amd64", "android/arm", "android/arm64", "android/386", + "freebsd/amd64", + "darwin/amd64", +@@ -83,7 +83,7 @@ func BuildModeSupported(compiler, buildmode, goos, goarch string) bool { + + case "pie": + switch platform { +- case "linux/386", "linux/amd64", "linux/arm", "linux/arm64", "linux/ppc64le", "linux/s390x", ++ case "linux/386", "linux/amd64", "linux/arm", "linux/arm64", "linux/ppc64le", "linux/riscv64", "linux/s390x", + "android/amd64", "android/arm", "android/arm64", "android/386", + "freebsd/amd64", + "darwin/amd64", +@@ -95,14 +95,14 @@ func BuildModeSupported(compiler, buildmode, goos, goarch string) bool { + + case "shared": + switch platform { +- case "linux/386", "linux/amd64", "linux/arm", "linux/arm64", "linux/ppc64le", "linux/s390x": ++ case "linux/386", "linux/amd64", "linux/arm", "linux/arm64", "linux/ppc64le", "linux/riscv64", "linux/s390x": + return true + } + return false + + case "plugin": + switch platform { +- case "linux/amd64", "linux/arm", "linux/arm64", "linux/386", "linux/s390x", "linux/ppc64le", ++ case "linux/amd64", "linux/arm", "linux/arm64", "linux/386", "linux/s390x", "linux/riscv64", "linux/ppc64le", + "android/amd64", "android/arm", "android/arm64", "android/386", + "darwin/amd64", + "freebsd/amd64": diff -pruN 1.15.8-1/debian/patches/fc3e6af10297b424175b44d2274de04c5f0b9e82.patch 1.15.8-1ubuntu3/debian/patches/fc3e6af10297b424175b44d2274de04c5f0b9e82.patch --- 1.15.8-1/debian/patches/fc3e6af10297b424175b44d2274de04c5f0b9e82.patch 1970-01-01 00:00:00.000000000 +0000 +++ 1.15.8-1ubuntu3/debian/patches/fc3e6af10297b424175b44d2274de04c5f0b9e82.patch 2021-02-17 01:18:23.000000000 +0000 @@ -0,0 +1,473 @@ +From fc3e6af10297b424175b44d2274de04c5f0b9e82 Mon Sep 17 00:00:00 2001 +From: Joel Sing +Date: Tue, 19 May 2020 18:54:48 +1000 +Subject: [PATCH] cmd/link: add support for external linking on linux/riscv64 + +Change-Id: I9902c36c94478f2b2e0739bb68ceccc23b53f0ec +--- + src/cmd/link/internal/arm/asm.go | 2 +- + src/cmd/link/internal/arm64/asm.go | 2 +- + src/cmd/link/internal/ld/config.go | 4 +- + src/cmd/link/internal/ld/elf.go | 3 + + src/cmd/link/internal/ld/elf2.go | 2 +- + src/cmd/link/internal/ld/lib.go | 2 +- + src/cmd/link/internal/ld/pcln.go | 2 +- + src/cmd/link/internal/ld/symtab.go | 12 ++- + src/cmd/link/internal/loadelf/ldelf.go | 48 +++++++-- + src/cmd/link/internal/mips/asm.go | 2 +- + src/cmd/link/internal/mips64/asm.go | 2 +- + src/cmd/link/internal/ppc64/asm.go | 2 +- + src/cmd/link/internal/riscv64/asm.go | 129 ++++++++++++++++++++++++- + src/cmd/link/internal/s390x/asm.go | 2 +- + src/cmd/link/internal/x86/asm.go | 2 +- + 15 files changed, 190 insertions(+), 26 deletions(-) + +diff --git a/src/cmd/link/internal/arm/asm.go b/src/cmd/link/internal/arm/asm.go +index 903e62108ea3..7e97c136a673 100644 +--- a/src/cmd/link/internal/arm/asm.go ++++ b/src/cmd/link/internal/arm/asm.go +@@ -249,7 +249,7 @@ func adddynrel2(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, s load + return false + } + +-func elfreloc1(ctxt *ld.Link, r *sym.Reloc, sectoff int64) bool { ++func elfreloc1(ctxt *ld.Link, s *sym.Symbol, r *sym.Reloc, sectoff int64) bool { + ctxt.Out.Write32(uint32(sectoff)) + + elfsym := ld.ElfSymForReloc(ctxt, r.Xsym) +diff --git a/src/cmd/link/internal/arm64/asm.go b/src/cmd/link/internal/arm64/asm.go +index 417e4b1f4c25..aac8bec89869 100644 +--- a/src/cmd/link/internal/arm64/asm.go ++++ b/src/cmd/link/internal/arm64/asm.go +@@ -325,7 +325,7 @@ func adddynrel2(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, s load + return false + } + +-func elfreloc1(ctxt *ld.Link, r *sym.Reloc, sectoff int64) bool { ++func elfreloc1(ctxt *ld.Link, s *sym.Symbol, r *sym.Reloc, sectoff int64) bool { + ctxt.Out.Write64(uint64(sectoff)) + + elfsym := ld.ElfSymForReloc(ctxt, r.Xsym) +diff --git a/src/cmd/link/internal/ld/config.go b/src/cmd/link/internal/ld/config.go +index 2373b500e3aa..2186bf5b8104 100644 +--- a/src/cmd/link/internal/ld/config.go ++++ b/src/cmd/link/internal/ld/config.go +@@ -186,7 +186,7 @@ func mustLinkExternal(ctxt *Link) (res bool, reason string) { + // Internally linking cgo is incomplete on some architectures. + // https://golang.org/issue/14449 + // https://golang.org/issue/21961 +- if iscgo && ctxt.Arch.InFamily(sys.MIPS64, sys.MIPS, sys.PPC64) { ++ if iscgo && ctxt.Arch.InFamily(sys.MIPS64, sys.MIPS, sys.PPC64, sys.RISCV64) { + return true, objabi.GOARCH + " does not support internal cgo" + } + if iscgo && objabi.GOOS == "android" { +@@ -263,8 +263,6 @@ func determineLinkMode(ctxt *Link) { + } + case LinkExternal: + switch { +- case objabi.GOARCH == "riscv64": +- Exitf("external linking not supported for %s/riscv64", objabi.GOOS) + case objabi.GOARCH == "ppc64" && objabi.GOOS != "aix": + Exitf("external linking not supported for %s/ppc64", objabi.GOOS) + } +diff --git a/src/cmd/link/internal/ld/elf.go b/src/cmd/link/internal/ld/elf.go +index 78298beafe70..5468fb8cdc6a 100644 +--- a/src/cmd/link/internal/ld/elf.go ++++ b/src/cmd/link/internal/ld/elf.go +@@ -506,6 +506,9 @@ func Elfinit(ctxt *Link) { + if ctxt.Arch.Family == sys.MIPS64 { + ehdr.flags = 0x20000004 /* MIPS 3 CPIC */ + } ++ if ctxt.Arch.Family == sys.RISCV64 { ++ ehdr.flags = 0x4 /* RISCV Float ABI Double */ ++ } + elf64 = true + + ehdr.phoff = ELF64HDRSIZE /* Must be ELF64HDRSIZE: first PHdr must follow ELF header */ +diff --git a/src/cmd/link/internal/ld/elf2.go b/src/cmd/link/internal/ld/elf2.go +index 07b64cfcb07c..41c927c5858c 100644 +--- a/src/cmd/link/internal/ld/elf2.go ++++ b/src/cmd/link/internal/ld/elf2.go +@@ -69,7 +69,7 @@ func elfrelocsect2(ctxt *Link, sect *sym.Section, syms []*sym.Symbol) { + if !r.Xsym.Attr.Reachable() { + Errorf(s, "unreachable reloc %d (%s) target %v", r.Type, sym.RelocName(ctxt.Arch, r.Type), r.Xsym.Name) + } +- if !thearch.Elfreloc1(ctxt, r, int64(uint64(s.Value+int64(r.Off))-sect.Vaddr)) { ++ if !thearch.Elfreloc1(ctxt, s, r, int64(uint64(s.Value+int64(r.Off))-sect.Vaddr)) { + Errorf(s, "unsupported obj reloc %d (%s)/%d to %s", r.Type, sym.RelocName(ctxt.Arch, r.Type), r.Siz, r.Sym.Name) + } + } +diff --git a/src/cmd/link/internal/ld/lib.go b/src/cmd/link/internal/ld/lib.go +index 0366bc7a6f45..873c1e878ee7 100644 +--- a/src/cmd/link/internal/ld/lib.go ++++ b/src/cmd/link/internal/ld/lib.go +@@ -271,7 +271,7 @@ type Arch struct { + Asmb func(*Link, *loader.Loader) + Asmb2 func(*Link) + +- Elfreloc1 func(*Link, *sym.Reloc, int64) bool ++ Elfreloc1 func(*Link, *sym.Symbol, *sym.Reloc, int64) bool + Elfreloc2 func(*Link, *loader.Loader, loader.Sym, loader.ExtRelocView, int64) bool + Elfsetupplt func(ctxt *Link, plt, gotplt *loader.SymbolBuilder, dynamic loader.Sym) + Gentext func(*Link) +diff --git a/src/cmd/link/internal/ld/pcln.go b/src/cmd/link/internal/ld/pcln.go +index 5cbb7bbaccb4..ac9787141f5f 100644 +--- a/src/cmd/link/internal/ld/pcln.go ++++ b/src/cmd/link/internal/ld/pcln.go +@@ -574,7 +574,7 @@ func expandGoroot(s string) string { + + const ( + BUCKETSIZE = 256 * MINFUNC +- SUBBUCKETS = 16 ++ SUBBUCKETS = 32 + SUBBUCKETSIZE = BUCKETSIZE / SUBBUCKETS + NOIDX = 0x7fffffff + ) +diff --git a/src/cmd/link/internal/ld/symtab.go b/src/cmd/link/internal/ld/symtab.go +index 46aa33bcb168..28a728f75f9c 100644 +--- a/src/cmd/link/internal/ld/symtab.go ++++ b/src/cmd/link/internal/ld/symtab.go +@@ -185,7 +185,11 @@ func putelfsym(ctxt *Link, x *sym.Symbol, s string, t SymbolType, addr int64) { + // ELF linker -Bsymbolic-functions option, but that is buggy on + // several platforms. + putelfsyment(ctxt.Out, putelfstr("local."+s), addr, size, STB_LOCAL<<4|typ&0xf, elfshnum, other) +- ctxt.loader.SetSymLocalElfSym(loader.Sym(x.SymIdx), int32(ctxt.numelfsym)) ++ if ctxt.Target.IsRISCV64() && x.SymIdx == 0 { ++ x.SetGot(int32(ctxt.numelfsym)) ++ } else { ++ ctxt.loader.SetSymLocalElfSym(loader.Sym(x.SymIdx), int32(ctxt.numelfsym)) ++ } + ctxt.numelfsym++ + return + } else if bind != ctxt.elfbind { +@@ -193,7 +197,11 @@ func putelfsym(ctxt *Link, x *sym.Symbol, s string, t SymbolType, addr int64) { + } + + putelfsyment(ctxt.Out, putelfstr(s), addr, size, bind<<4|typ&0xf, elfshnum, other) +- ctxt.loader.SetSymElfSym(loader.Sym(x.SymIdx), int32(ctxt.numelfsym)) ++ if ctxt.Target.IsRISCV64() && x.SymIdx == 0 { ++ x.SetGot(int32(ctxt.numelfsym)) ++ } else { ++ ctxt.loader.SetSymElfSym(loader.Sym(x.SymIdx), int32(ctxt.numelfsym)) ++ } + ctxt.numelfsym++ + } + +diff --git a/src/cmd/link/internal/loadelf/ldelf.go b/src/cmd/link/internal/loadelf/ldelf.go +index bb5b4ffc0a30..1f5fd643d0f7 100644 +--- a/src/cmd/link/internal/loadelf/ldelf.go ++++ b/src/cmd/link/internal/loadelf/ldelf.go +@@ -372,6 +372,11 @@ func Load(l *loader.Loader, arch *sys.Arch, localSymVersion int, f *bio.Reader, + return errorf("elf object but not ppc64") + } + ++ case sys.RISCV64: ++ if mach != elf.EM_RISCV || class != elf.ELFCLASS64 { ++ return errorf("elf object but not riscv64") ++ } ++ + case sys.S390X: + if mach != elf.EM_S390 || class != elf.ELFCLASS64 { + return errorf("elf object but not s390x") +@@ -591,6 +596,11 @@ func Load(l *loader.Loader, arch *sys.Arch, localSymVersion int, f *bio.Reader, + continue + } + ++ if strings.HasPrefix(sect.name, ".debug_") && elfsym.type_ == 0 { ++ // This happens with gcc on RISCV64. ++ continue ++ } ++ + if strings.HasPrefix(elfsym.name, ".LASF") { // gcc on s390x does this + continue + } +@@ -946,14 +956,15 @@ func relSize(arch *sys.Arch, pn string, elftype uint32) (uint8, error) { + // performance. + + const ( +- AMD64 = uint32(sys.AMD64) +- ARM = uint32(sys.ARM) +- ARM64 = uint32(sys.ARM64) +- I386 = uint32(sys.I386) +- PPC64 = uint32(sys.PPC64) +- S390X = uint32(sys.S390X) +- MIPS = uint32(sys.MIPS) +- MIPS64 = uint32(sys.MIPS64) ++ AMD64 = uint32(sys.AMD64) ++ ARM = uint32(sys.ARM) ++ ARM64 = uint32(sys.ARM64) ++ I386 = uint32(sys.I386) ++ MIPS = uint32(sys.MIPS) ++ MIPS64 = uint32(sys.MIPS64) ++ PPC64 = uint32(sys.PPC64) ++ RISCV64 = uint32(sys.RISCV64) ++ S390X = uint32(sys.S390X) + ) + + switch uint32(arch.Family) | elftype<<16 { +@@ -1056,6 +1067,27 @@ func relSize(arch *sys.Arch, pn string, elftype uint32) (uint8, error) { + S390X | uint32(elf.R_390_GOT64)<<16, + S390X | uint32(elf.R_390_PLT64)<<16: + return 8, nil ++ ++ case RISCV64 | uint32(elf.R_RISCV_RVC_BRANCH)<<16, ++ RISCV64 | uint32(elf.R_RISCV_RVC_JUMP)<<16: ++ return 2, nil ++ ++ case RISCV64 | uint32(elf.R_RISCV_32)<<16, ++ RISCV64 | uint32(elf.R_RISCV_BRANCH)<<16, ++ RISCV64 | uint32(elf.R_RISCV_HI20)<<16, ++ RISCV64 | uint32(elf.R_RISCV_LO12_I)<<16, ++ RISCV64 | uint32(elf.R_RISCV_LO12_S)<<16, ++ RISCV64 | uint32(elf.R_RISCV_GOT_HI20)<<16, ++ RISCV64 | uint32(elf.R_RISCV_PCREL_HI20)<<16, ++ RISCV64 | uint32(elf.R_RISCV_PCREL_LO12_I)<<16, ++ RISCV64 | uint32(elf.R_RISCV_PCREL_LO12_S)<<16, ++ RISCV64 | uint32(elf.R_RISCV_RELAX)<<16: ++ return 4, nil ++ ++ case RISCV64 | uint32(elf.R_RISCV_64)<<16, ++ RISCV64 | uint32(elf.R_RISCV_CALL)<<16, ++ RISCV64 | uint32(elf.R_RISCV_CALL_PLT)<<16: ++ return 8, nil + } + } + +diff --git a/src/cmd/link/internal/mips/asm.go b/src/cmd/link/internal/mips/asm.go +index 9710b9cffa09..37a7700ad72f 100644 +--- a/src/cmd/link/internal/mips/asm.go ++++ b/src/cmd/link/internal/mips/asm.go +@@ -51,7 +51,7 @@ func adddynrel(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, s *sym. + return false + } + +-func elfreloc1(ctxt *ld.Link, r *sym.Reloc, sectoff int64) bool { ++func elfreloc1(ctxt *ld.Link, s *sym.Symbol, r *sym.Reloc, sectoff int64) bool { + ctxt.Out.Write32(uint32(sectoff)) + + elfsym := ld.ElfSymForReloc(ctxt, r.Xsym) +diff --git a/src/cmd/link/internal/mips64/asm.go b/src/cmd/link/internal/mips64/asm.go +index b48241b5aebd..b688a8f0725d 100644 +--- a/src/cmd/link/internal/mips64/asm.go ++++ b/src/cmd/link/internal/mips64/asm.go +@@ -49,7 +49,7 @@ func adddynrel(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, s *sym. + return false + } + +-func elfreloc1(ctxt *ld.Link, r *sym.Reloc, sectoff int64) bool { ++func elfreloc1(ctxt *ld.Link, s *sym.Symbol, r *sym.Reloc, sectoff int64) bool { + // mips64 ELF relocation (endian neutral) + // offset uint64 + // sym uint32 +diff --git a/src/cmd/link/internal/ppc64/asm.go b/src/cmd/link/internal/ppc64/asm.go +index b1c0873d7a67..1aa5051423ef 100644 +--- a/src/cmd/link/internal/ppc64/asm.go ++++ b/src/cmd/link/internal/ppc64/asm.go +@@ -443,7 +443,7 @@ func xcoffreloc1(arch *sys.Arch, out *ld.OutBuf, s *sym.Symbol, r *sym.Reloc, se + + } + +-func elfreloc1(ctxt *ld.Link, r *sym.Reloc, sectoff int64) bool { ++func elfreloc1(ctxt *ld.Link, s *sym.Symbol, r *sym.Reloc, sectoff int64) bool { + // Beware that bit0~bit15 start from the third byte of a instruction in Big-Endian machines. + if r.Type == objabi.R_ADDR || r.Type == objabi.R_POWER_TLS || r.Type == objabi.R_CALLPOWER { + } else { +diff --git a/src/cmd/link/internal/riscv64/asm.go b/src/cmd/link/internal/riscv64/asm.go +index 5183de8d6b73..a3f19b2a7253 100644 +--- a/src/cmd/link/internal/riscv64/asm.go ++++ b/src/cmd/link/internal/riscv64/asm.go +@@ -11,11 +11,16 @@ import ( + "cmd/link/internal/ld" + "cmd/link/internal/loader" + "cmd/link/internal/sym" ++ "debug/elf" + "fmt" + "log" ++ "sort" + "sync" + ) + ++// fakeLabelName matches the RISCV_FAKE_LABEL_NAME from binutils. ++const fakeLabelName = ".L0 " ++ + func gentext2(ctxt *ld.Link, ldr *loader.Loader) { + } + +@@ -28,9 +33,72 @@ func adddynrel(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, s *sym. + return false + } + +-func elfreloc1(ctxt *ld.Link, r *sym.Reloc, sectoff int64) bool { +- log.Fatalf("elfreloc1") +- return false ++func findHI20Symbol(ctxt *ld.Link, val int64) *sym.Symbol { ++ for idx := sort.Search(len(ctxt.Textp), func(i int) bool { return ctxt.Textp[i].Value >= val }); idx < len(ctxt.Textp); idx++ { ++ s := ctxt.Textp[idx] ++ if s.Value != val { ++ return nil ++ } ++ if s.Type == sym.STEXT && s.Name == fakeLabelName { ++ return s ++ } ++ } ++ return nil ++} ++ ++func elfreloc1(ctxt *ld.Link, s *sym.Symbol, r *sym.Reloc, sectoff int64) bool { ++ elfsym := ld.ElfSymForReloc(ctxt, r.Xsym) ++ switch r.Type { ++ case objabi.R_ADDR: ++ ctxt.Out.Write64(uint64(sectoff)) ++ switch r.Siz { ++ case 4: ++ ctxt.Out.Write64(uint64(elf.R_RISCV_32) | uint64(elfsym)<<32) ++ case 8: ++ ctxt.Out.Write64(uint64(elf.R_RISCV_64) | uint64(elfsym)<<32) ++ default: ++ ld.Errorf(nil, "unknown size %d for %v relocation", r.Siz, r.Type) ++ return false ++ } ++ ctxt.Out.Write64(uint64(r.Xadd)) ++ ++ case objabi.R_CALLRISCV: ++ // Call relocations are currently handled via R_RISCV_PCREL_ITYPE. ++ // TODO(jsing): Consider generating elf.R_RISCV_CALL instead of a ++ // HI20/LO12_I pair. ++ ++ case objabi.R_RISCV_PCREL_ITYPE, objabi.R_RISCV_PCREL_STYPE: ++ // Find the text symbol for the AUIPC instruction targeted ++ // by this relocation. ++ hi20Sym := findHI20Symbol(ctxt, s.Value+int64(r.Off)) ++ if hi20Sym == nil || hi20Sym.Type != sym.STEXT { ++ ld.Errorf(nil, "failed to find text symbol for HI20 relocation at %d (%x)", sectoff, s.Value+int64(r.Off)) ++ return false ++ } ++ ++ // Emit two relocations - a R_RISCV_PCREL_HI20 relocation and a ++ // corresponding R_RISCV_PCREL_LO12_I or R_RISCV_PCREL_LO12_S relocation. ++ // Note that the LO12 relocation must refer to a text symbol that points ++ // to the instruction that has the HI20 relocation given for a symbol. ++ var hiRel, loRel elf.R_RISCV ++ switch r.Type { ++ case objabi.R_RISCV_PCREL_ITYPE: ++ hiRel, loRel = elf.R_RISCV_PCREL_HI20, elf.R_RISCV_PCREL_LO12_I ++ case objabi.R_RISCV_PCREL_STYPE: ++ hiRel, loRel = elf.R_RISCV_PCREL_HI20, elf.R_RISCV_PCREL_LO12_S ++ } ++ ctxt.Out.Write64(uint64(sectoff)) ++ ctxt.Out.Write64(uint64(hiRel) | uint64(elfsym)<<32) ++ ctxt.Out.Write64(uint64(r.Xadd)) ++ ctxt.Out.Write64(uint64(sectoff + 4)) ++ ctxt.Out.Write64(uint64(loRel) | uint64(hi20Sym.Got())<<32) ++ ctxt.Out.Write64(uint64(0)) ++ ++ default: ++ return false ++ } ++ ++ return true + } + + func elfsetupplt(ctxt *ld.Link, plt, gotplt *loader.SymbolBuilder, dynamic loader.Sym) { +@@ -43,6 +111,36 @@ func machoreloc1(arch *sys.Arch, out *ld.OutBuf, s *sym.Symbol, r *sym.Reloc, se + } + + func archreloc(target *ld.Target, syms *ld.ArchSyms, r *sym.Reloc, s *sym.Symbol, val int64) (int64, bool) { ++ if target.IsExternal() { ++ switch r.Type { ++ case objabi.R_CALLRISCV: ++ r.Done = false ++ r.Xsym = r.Sym ++ r.Xadd = r.Add ++ return val, true ++ ++ case objabi.R_RISCV_PCREL_ITYPE, objabi.R_RISCV_PCREL_STYPE: ++ r.Done = false ++ ++ // Set up addend for eventual relocation via outer symbol. ++ rs := r.Sym ++ r.Xadd = r.Add ++ for rs.Outer != nil { ++ r.Xadd += ld.Symaddr(rs) - ld.Symaddr(rs.Outer) ++ rs = rs.Outer ++ } ++ ++ if rs.Type != sym.SHOSTOBJ && rs.Type != sym.SDYNIMPORT && rs.Sect == nil { ++ ld.Errorf(s, "missing section for %s", rs.Name) ++ } ++ r.Xsym = rs ++ ++ return val, true ++ } ++ ++ return val, false ++ } ++ + switch r.Type { + case objabi.R_CALLRISCV: + // Nothing to do. +@@ -98,6 +196,29 @@ func archrelocvariant(target *ld.Target, syms *ld.ArchSyms, r *sym.Reloc, s *sym + return -1 + } + ++func genHi20TextSymbols(ctxt *ld.Link) { ++ // Generate a local text symbol for each relocation target, as the ++ // R_RISCV_PCREL_LO12_* relocations generated by elfreloc1 need it. ++ var syms []*sym.Symbol ++ for _, s := range ctxt.Textp { ++ for _, r := range s.R { ++ if r.Type != objabi.R_RISCV_PCREL_ITYPE && r.Type != objabi.R_RISCV_PCREL_STYPE { ++ continue ++ } ++ sym := &sym.Symbol{ ++ Type: sym.STEXT, ++ Name: fakeLabelName, ++ Value: s.Value + int64(r.Off), ++ Attr: sym.AttrDuplicateOK | sym.AttrLocal | sym.AttrVisibilityHidden, ++ Sect: s.Sect, ++ } ++ syms = append(syms, sym) ++ } ++ } ++ ctxt.Textp = append(ctxt.Textp, syms...) ++ sort.SliceStable(ctxt.Textp, func(i, j int) bool { return ctxt.Textp[i].Value < ctxt.Textp[j].Value }) ++} ++ + func asmb(ctxt *ld.Link, _ *loader.Loader) { + if ctxt.IsELF { + ld.Asmbelfsetup() +@@ -141,6 +262,8 @@ func asmb2(ctxt *ld.Link) { + symo = uint32(ld.Rnd(int64(symo), int64(*ld.FlagRound))) + ctxt.Out.SeekSet(int64(symo)) + ++ genHi20TextSymbols(ctxt) ++ + ld.Asmelfsym(ctxt) + ctxt.Out.Write(ld.Elfstrdat) + +diff --git a/src/cmd/link/internal/s390x/asm.go b/src/cmd/link/internal/s390x/asm.go +index 2115b5fc65f9..0069259e9fe0 100644 +--- a/src/cmd/link/internal/s390x/asm.go ++++ b/src/cmd/link/internal/s390x/asm.go +@@ -221,7 +221,7 @@ func adddynrel2(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, s load + return false + } + +-func elfreloc1(ctxt *ld.Link, r *sym.Reloc, sectoff int64) bool { ++func elfreloc1(ctxt *ld.Link, s *sym.Symbol, r *sym.Reloc, sectoff int64) bool { + ctxt.Out.Write64(uint64(sectoff)) + + elfsym := ld.ElfSymForReloc(ctxt, r.Xsym) +diff --git a/src/cmd/link/internal/x86/asm.go b/src/cmd/link/internal/x86/asm.go +index b218ffae83d9..4713f1c25e54 100644 +--- a/src/cmd/link/internal/x86/asm.go ++++ b/src/cmd/link/internal/x86/asm.go +@@ -340,7 +340,7 @@ func adddynrel2(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, s load + return false + } + +-func elfreloc1(ctxt *ld.Link, r *sym.Reloc, sectoff int64) bool { ++func elfreloc1(ctxt *ld.Link, s *sym.Symbol, r *sym.Reloc, sectoff int64) bool { + ctxt.Out.Write32(uint32(sectoff)) + + elfsym := ld.ElfSymForReloc(ctxt, r.Xsym) diff -pruN 1.15.8-1/debian/patches/series 1.15.8-1ubuntu3/debian/patches/series --- 1.15.8-1/debian/patches/series 2021-02-05 12:51:44.000000000 +0000 +++ 1.15.8-1ubuntu3/debian/patches/series 2021-02-17 01:18:23.000000000 +0000 @@ -4,3 +4,9 @@ 0004-cmd-dist-fix-build-failure-of-misc-cgo-test-on-arm64.patch 0005-cmd-dist-increase-default-timeout-scale-for-arm.patch 0006-skip-userns-test-in-schroot-as-well.patch +0001-cmd-link-check-CGO_CFLAGS-for-non-g-I-O-options-befo.patch +fc3e6af10297b424175b44d2274de04c5f0b9e82.patch +98d9c96b21ae096926575363091ec1fccfd6416e.patch +70ca9a801164e370cc6adf443d40a95c24143400.patch +1f76e888dfcc67159b012c503ed2961691e0cf85.patch +ba41f5960408a58339e6efb1bf379031cc35efeb.patch